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题名:
Study of SiGe selective epitaxial process integration with high-k and metal gate for 16/14 nm nodes FinFET technology
作者: Wang, GL; Qin, CL; Yin, HX; Luo, J; Duan, NY; Yang, P; Gao, XY; Yang, T; Li, JF; Yan, J; Zhu, HL; Wang, WW; Chen, DP; Ye, TC; Zhao, C; Radamson, HH
刊名: MICROELECTRONIC ENGINEERING
出版日期: 2016
卷号: 163, 页码:49-54
关键词: FinFET ; SiGe selective epitaxy ; RPCVD ; High-k & metal gate
DOI: 10.1016/j.mee.2016.06.002
通讯作者: Wang, GL ; Luo, J (reprint author), Chinese Acad Sci, Inst Microelect, Key Lab Microelect Devices & Integrated Technol, Beijing 100029, Peoples R China.
文章类型: 期刊论文
英文摘要: In this study, the process integration of SiGe selective epitaxy on source/drain regions, for 16/14 nm nodes FinFET with high-k & metal gate has been presented. Selectively grown Si1-xGex (0.35 <= x <= 0.40) with boron concentration of 1 x 10(20) cm(-3) was used to elevate the source/drain of the transistors. The epi-quality, layer profile and strain amount of the selectively grown SiGe layers were also investigated by means of various characterizations. A series of prebaking experiments were performed for temperatures ranging from 740 to 825 degrees C in order to in situ clean the Si fins prior to the epitaxy. The results showed that the thermal budget needs to be limited to 780-800 degrees C in order to avoid any damages to the shape of Si fins but to remove the native oxide effectively which is essential for high epitaxial quality. The Ge content in SiGe layers on Si fins was determined from the strain measured directly by reciprocal space mappings using synchrotron radiation. Atomic layer deposition technique was applied to fill the gate trench with W using WF6 and B2H6 precursors. By such an AID approach, decent growth rate, low resistivity and excellent gap filling capability of W in pretty high aspect-ratio gate trench was realized. The as-fabricated FinFETs demonstrated decent electrical characteristics. (C) 2016 Elsevier B.V. All rights reserved.
收录类别: SCI
语种: 英语
WOS记录号: WOS:000381837300008
ISSN号: 0167-9317
Citation statistics:
内容类型: 期刊论文
URI标识: http://ir.sinap.ac.cn/handle/331007/26635
Appears in Collections:中科院上海应用物理研究所2011-2017年_期刊论文

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Recommended Citation:
Wang, GL,Qin, CL,Yin, HX,et al. Study of SiGe selective epitaxial process integration with high-k and metal gate for 16/14 nm nodes FinFET technology[J]. MICROELECTRONIC ENGINEERING,2016-01-01,163:49-54.
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