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Study of SiGe selective epitaxial process integration with high-k and metal gate for 16/14 nm nodes FinFET technology 期刊论文
MICROELECTRONIC ENGINEERING, 2016, 卷号: 163, 页码: 49-54
Authors:  Wang, GL;  Qin, CL;  Yin, HX;  Luo, J;  Duan, NY;  Yang, P;  Gao, XY;  Yang, T;  Li, JF;  Yan, J;  Zhu, HL;  Wang, WW;  Chen, DP;  Ye, TC;  Zhao, C;  Radamson, HH;  Luo, J (reprint author), Chinese Acad Sci, Inst Microelect, Key Lab Microelect Devices & Integrated Technol, Beijing 100029, Peoples R China.
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Finfet  Sige Selective Epitaxy  Rpcvd  High-k & Metal Gate